Interpretation of four-layer PCB circuit board stack design scheme
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- Time of issue:2021-03-08
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(Summary description)When imagining a four-layer PCB circuit board, how to imagine that the stack is normal? In practice, there can be three plans. Plan one, 1 power layer, 1 floor, and 2 signal layers. Discrimination is displayed like this: TOP (signal layer), L2 (floor), L3 (power layer), BOT (signal layer). Plan two, 1 power layer, 1 floor, and 2 signal layers. The identification is displayed like this: TOP (power layer), L2 (signal layer), L3 (signal layer), BOT (floor). Plan three, 1 power layer, 1 floor, and 2 signal layers. Discrimination is displayed like this: TO
Interpretation of four-layer PCB circuit board stack design scheme
(Summary description)When imagining a four-layer PCB circuit board, how to imagine that the stack is normal?
In practice, there can be three plans.
Plan one, 1 power layer, 1 floor, and 2 signal layers. Discrimination is displayed like this: TOP (signal layer), L2 (floor), L3 (power layer), BOT (signal layer).
Plan two, 1 power layer, 1 floor, and 2 signal layers. The identification is displayed like this: TOP (power layer), L2 (signal layer), L3 (signal layer), BOT (floor).
Plan three, 1 power layer, 1 floor, and 2 signal layers. Discrimination is displayed like this: TO
- Categories:Company News
- Author:
- Origin:
- Time of issue:2021-03-08
- Views:
When imagining a four-layer PCB circuit board, how to imagine that the stack is normal?
In practice, there can be three plans.
Plan one, 1 power layer, 1 floor, and 2 signal layers. Discrimination is displayed like this: TOP (signal layer), L2 (floor), L3 (power layer), BOT (signal layer).
Plan two, 1 power layer, 1 floor, and 2 signal layers. The identification is displayed like this: TOP (power layer), L2 (signal layer), L3 (signal layer), BOT (floor).
Plan three, 1 power layer, 1 floor, and 2 signal layers. Discrimination is displayed like this: TOP (signal layer), L2 (power layer), L3 (floor), BOT (signal layer).
Signal layer
Strata
Power layer
Signal layer
What are the advantages and disadvantages of these three plans?
Plan 1. The main laminate design plan of the four-layer PCB of this plan is that there is a three-dimensional under the component surface, and the key signal preselects the TOP layer; as for the layer thickness installation, there are the following suggestions:
Satisfying that the impedance control core board (GND to POWER) should not be too thick to increase the three-dimensional dispersion impedance of the power supply and ground; to ensure the three-dimensional decoupling effect of the power supply.
Scheme two, some schemes mainly in order to achieve a certain shielding effect, put the power supply and ground plane on the TOP and BOTTOM layer, but this scheme must achieve the ideal shielding effect, at least the following defects: 1. The power supply and the ground are too far apart, the power supply The plane impedance is large. 2. The power supply and ground plane are extremely incomplete due to the influence of component pads. Because the reference plane is incomplete and the signal impedance is not continuous, in fact, due to the large number of surface mount devices, the power supply and ground of this solution can hardly be used as a complete reference plane, and the expected shielding effect is very high when the devices are getting denser. Difficult to achieve; Solution 2 has a limited range of use. But among individual boards, Solution 2 is the best layer setting solution.
Scheme 3: This scheme is similar to scheme 1, and is suitable for the case where the main components are laid out in the BOTTOM layout or the bottom layer of key signals;
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